1、VDDI/GND（3~5.5V）与VDDA/B GNDA/B（7~25V）两边隔离供电，两边不能共地；
2、驱动半桥时，VDDA驱动上管时，需要连接自举升压二极管，并且两个MOS管之间和GNDA相连接并与VDDA之间连接泵电容完成自举升压；
3、Low-ESR and low-ESL bypass capacitors should be placed close to the device between pin VDDI to GND and pin VDDA/B to GNDA/B.
4、There is high frequency switching current that charges and discharges the gate of external power transistor, leading to EMI and ring issues. The parasitic inductance of this loop should be minimized, by decreasing loop area and placing NSI6602 close to power transistor.
5、Large amount of copper should be placed at VDDA/B pin and GNDA/B pin for thermal dissipation.
6、To ensure isolation performance between primary and secondary side, the space under the device should keep free from any plane, trace, pad or via.